AMD is reportedly preparing to react to the launch of Intel’s Core Ultra 200K Plus, the refreshed chips based on the Arrow Lake architecture. For this, the company would prepare Ryzen 7 9750X and Ryzen 5 9650X whose operating frequencies would be revised upwards. Otherwise, there would be no major change in the characteristics of the CPU. They would keep the same number of cores and the same amount of cache memory!
Ryzen 7 9750X and Ryzen 5 9650X: two CPU refresh on the AMD side!
To put it simply, with these two processors, AMD would basically take the same characteristics as its CPU originals. From then on, the 9750X would have 8 cores and 16 threads against 6 cores and 12 threads for the 9650X. In the first case, we would find a total of 32 MB of L3 cache coupled with 8 MB of L2 cache. The second CPU would have 32 MB of L3 coupled with 8 MB of L2. Here, no change in the support of the RAM since we always talk about DDR5 5600 MT/s.
What changes, however, are the base frequencies which benefit from a gain of +400 MHz. The frequency boost is also improved with +100 MHz. Concretely, we would have a 9750X which would run at 4.2 GHz base compared to 3.8 GHz for the original 9700X while the turbo would reach 5.6 GHz compared to 5.5 GHz. On the 9650X side, same fight, the frequencies would be 4.3 GHz and 5.5 GHz (base and boost) compared to 3.9 GHz and 5.4 GHz respectively.
Obviously, these frequency increases will have an impact on the TDP which would increase to 120W. Remember that the 9600X is at 65W, just like the 9700X… Before AMD offers updates to increase its thermal envelope to 105W.
In any case, we can expect performance increases linked to the increase in frequencies, but that’s it. Just like the Ryzen 7 9850X3D, we are curious to see what impact this increase in frequencies will have on the energy efficiency of the CPU.
As for pricing, these newcomers are expected to replace current versions at their MSRP prices. The 9700X and 9600X are therefore expected to drop in price. To see what will happen in practice.
